Using the MCP-1200 Exception Handler

One of the key advantages of using the MCP-1200 over a MCU is its ability to capture and act upon low level events immediately. Many high speed and critical positioning applications struggle with how to implement these types of requirements. Using the MCP-1200 Exception Handler and its associated registers provides a simple yet flexible way to capture or trigger high-speed events.

Exception Handling Register

The Exception Handling Register looks at the following items:

User configuration allows for the exception to be handled in the following ways.

Capture Control Register and Position

The Capture Control Register configures how the position count is captured based on a signal from either or both the INDEX pin and TRIG I/O pin. Once the signal is enabled the chip is armed and ready for a trigger. A trigger bit is set once the signal transition has been detected and the current position is stored in the Capture Position registers. To "re-arm" the capture feature the host must clear the active latch output. The latches for the INDEX and TRIG I/O pins are always active and may be cleared and monitored without enabling the Capture Position feature.

Breakpoint Configuration

The breakpoint feature provides an output signal and a programmable exception response when a user-specified position count is reached. The feature is activated in the Advanced Configuration Register. The breakpoint feature supports two modes of operation: single and repeat. In single mode the Breakpoint registers represent an absolute position count. When the actual position matches this Breakpoint position the Breakpoint Flag is set.

The response to a breakpoint condition depends on settings in the control registers. The TRIG I/O pin can be set to output the status of the Breakpoint Flag. Additionally, the breakpoint condition can be used to trigger an error response from the chip. This must be configured in the Exception Handling Register. The Breakpoint can act as a software limit when configured to go into Idle mode. The Breakpoint Flag must be cleared to start the process again.

In the repeat mode, the 2's complement value of the Breakpoint Register is added to the current hardware compare register whenever a breakpoint occurs. Used in conjunction with the TRIG I/O pin allows regular interval triggering of external hardware without program intervention. When a breakpoint is reached the Breakpoint Flag and TRIG I/O pin are hardware triggered for virtually an instantaneous response.